LOW INPUT VOLTAGE, CAP FREE 50-mA LOW-DROPOUT LINEAR REGULATORS

FEATURES 50-mA LDO Available in 1.5-V, 1.6-V, and 1.8-V Fixed-Output and Adjustable Versions Low Input Voltage Requirement Down to 1.8 V) Small Output Capacitor, 0.1-μF Dropout Voltage Typically 50 mV at 50 mA Less Than 1 μA Quiescent Current in Shutdown Mode Thermal Protection Over Cur

封装/外壳：SC-74A，SOT-753 包装：卷带（TR） 描述：IC REG LINEAR 1.5V 50MA SOT23-5 集成电路（IC） 线性 + 开关稳压器

封装/外壳：SC-74A，SOT-753 包装：卷带（TR） 描述：IC REG LINEAR 1.5V 50MA SOT23-5 集成电路（IC） 稳压器 - 线性

LOW INPUT VOLTAGE, CAP FREE 50-mA LOW-DROPOUT LINEAR REGULATORS

文件：119.89 Kbytes Page：11 Pages

LOW INPUT VOLTAGE, CAP FREE 50-mA LOW-DROPOUT LINEAR REGULATORS

文件：119.89 Kbytes Page：11 Pages

LOW INPUT VOLTAGE, CAP FREE 50-mA LOW-DROPOUT LINEAR REGULATORS

文件：119.89 Kbytes Page：11 Pages

CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18

DESCRIPTION: The IDT72205LB/72215LB/72225LB/72235LB/72245LB are very high-speed, low-power First-In, First-Out (FIFO) memories with clocked read and write controls. FEATURES: • 256 x 18-bit organization array (72205LB) • 512 x 18-bit organization array (72215LB) • 1024 x 18-bit organizat

CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18

DESCRIPTION: The IDT72205LB/72215LB/72225LB/72235LB/72245LB are very high-speed, low-power First-In, First-Out (FIFO) memories with clocked read and write controls. FEATURES: • 256 x 18-bit organization array (72205LB) • 512 x 18-bit organization array (72215LB) • 1024 x 18-bit organizat