4.5-V TO 20-V SYNCHRONOUS BUCK CONTROLLER WITH SYNCHRONIZATION AND

文件：1.5181 Mbytes Page：44 Pages

封装/外壳：16-VFQFN 裸露焊盘 功能：降压 包装：卷带（TR） 描述：IC REG CTRLR BUCK 16VQFN 集成电路（IC） PMIC - 稳压器 - DC DC 开关式控制器

封装/外壳：16-VFQFN 裸露焊盘 功能：降压 包装：卷带（TR） 描述：IC REG CTRLR BUCK 16VQFN 集成电路（IC） DC-DC 开关控制器

4.5-V TO 20-V SYNCHRONOUS BUCK CONTROLLER WITH SYNCHRONIZATION AND

文件：1.5181 Mbytes Page：44 Pages

4-bit universal shift register

DESCRIPTION The HEF40195B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

4-bit universal shift register

DESCRIPTION The HEF40195B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

4-bit universal shift register

DESCRIPTION The HEF40195B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

4-bit universal shift register

DESCRIPTION The HEF40195B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

4-bit universal shift register

DESCRIPTION The HEF40195B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions