丝印代码：TPS2057；TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

features 135-mW -Maximum (5-V Input) High-Side MOSFET Switch 250 mA Continuous Current per Channel Independent Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7-V to 5.5-V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 20

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC PWR SWTCH N-CH 1:2/1:1 16SOIC 集成电路（IC） 配电开关，负载驱动器

电源开关 IC - 配电 Triple 2in 3 out .7A

TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

文件：597.91 Kbytes Page：27 Pages

丝印代码：TPS2057；TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

features 135-mW -Maximum (5-V Input) High-Side MOSFET Switch 250 mA Continuous Current per Channel Independent Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7-V to 5.5-V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 20

丝印代码：TPS2057；TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

features 135-mW -Maximum (5-V Input) High-Side MOSFET Switch 250 mA Continuous Current per Channel Independent Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7-V to 5.5-V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 20

TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

文件：597.91 Kbytes Page：27 Pages

TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

文件：420.67 Kbytes Page：24 Pages

TRIPLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

文件：420.67 Kbytes Page：24 Pages

Integrated Circuit Dual 16-Bit Digital-to-Analog Converter for CD and DAT Players

MISCELLAMEOUS INTEGRATED CIRCUITS

70 - 190 MHz I2C differential 1:10 clock driver

DESCRIPTION The PCK2057 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock outputs and one differential pair of feedback clock outputs. The clock outputs are controlled by the clock inputs (C

70 - 190 MHz I2C differential 1:10 clock driver

DESCRIPTION The PCK2057 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock outputs and one differential pair of feedback clock outputs. The clock outputs are controlled by the clock inputs (C