N-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

MOSFET, N-Channel Enhancement-Mode, 200V, 6.0 Ohm

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature Low threshold - 1.6V max. \nHigh input impedance \nLow input capacitance - 110pF typical \nFast switching speeds \nLow on-resistance \nFree from secondary breakdown \nLow input and output leakage;

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology\nThese low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the h ■ Low threshold — 1.6V max.\n■ High input impedance\n■ Low input capacitance — 110pF typical\n■ Fast switching speeds\n■ Low on resistance\n■ Free from secondary breakdown\n■ Low input and output leakage\n■ Complementary N- and P-channel devicesApplications\n■ Logic level interfaces – ideal for TTL ;

N-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

N-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

Silicon planar type

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Silicon planar type

文件：49.05 Kbytes Page：4 Pages

Silicon planar type

文件：49.05 Kbytes Page：4 Pages

P-Channel Enhancement-Mode Vertical DMOS FETs

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