Octal D flip-flop with common enable and clock

文件：252.48 Kbytes Page：5 Pages

Octal D flip-flop with common enable and clock

文件：252.48 Kbytes Page：5 Pages

Octal D flip-flop with common enable and clock

文件：252.48 Kbytes Page：5 Pages

OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE

The SN54 /74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The SN54/74LS378 is a 6-Bit Register with a buffered common enable. This device is similar

LOW POWER SCHOTTKY

The SN74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. • 8-Bit High Speed Parallel Registers • Positive Edge-Triggered D-Type Flip Flops • F

Octal D-Type Flip-Flop with Common Enable and Clock

General Description The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving (0.3 inch row spacing) 20-pin

Octal D Flip-Flop with Enable

文件：299.57 Kbytes Page：6 Pages

OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE

文件：180.21 Kbytes Page：16 Pages