FEATURES

· Output capability: standard

· ICC category: flip-flops

GENERAL DESCRIPTION

The 74HC/HCT74 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT74 are dual positive-edge triggered, D-type

flip-flops with individual data (D) inputs, clock (CP) inputs,

set (SD) and reset (RD) inputs; also complementary Q and

Q outputs.

The set and reset are asynchronous active LOW inputs

and operate independently of the clock input. Information

on the data input is transferred to the Q output on the

LOW-to-HIGH transition of the clock pulse. The D inputs

must be stable one set-up time prior to the LOW-to-HIGH

clock transition for predictable operation.

Schmitt-trigger action in the clock input makes the circuit

highly tolerant to slower clock rise and fall times.