General description

The 74HC273; 74HCT273 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL).

The 74HC273; 74HCT273 has eight edge-triggered, D-type flip-flops with individual

D inputs and Q outputs. The common clock (pin CP) and master reset (pin MR) inputs

load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up

time before the LOW-to-HIGH clock transition, is transferred to the corresponding output

(Qn) of the flip-flop.

All outputs will be forced LOW independently of clock or data inputs by a LOW voltage

level on the MR input.

The device is useful for applications where the true output only is required and the clock

and master reset are common to all storage elements.