Description

STA3005 is a high-performance, fully programmable advanced radio receiver, designed to target AM/FM/HD radio, speech and audio applications. It is a dual-IF radio processor, with dynamically variable channel filtering; it also features both digital diversity (for dual-tuner systems) and digital directional antenna (single-tuner multiple antennas) for outstanding reception capability.

Feature summary

■ DIGITAL DIVERSITY SYSTEM

■ DIGITAL DIRECTIONAL ANTENNA SYSTEM

■ TWO 5-BIT Σ∆ INTERMEDIATE FREQUENCY ADCs

■ INTERMEDIATE FREQUENCY PROCESSOR

■ AUDIO FILTER PROCESSOR

■ TWO 16-BIT STEREO AUDIO ADCs WITH INPUT AUDIO MULTIPLEXER

■ TWO 24-BIT STEREO AUDIO DACs WITH 5-BIT ANALOG VOLUME CONTROL

■ RADIO DATA SYSTEM (RDS) PROCESSOR

■ DSP-EMERALD SUBSYSTEM

24-bit, fixed point, 116MIPS DSP-EMERALD core

16k x 32bit (64kByte) program ROM (PROM)

6k x 32bit (64kByte) program RAM (PRAM)

6k x 24bit (18kByte) data XRAM

6k x 24bit (18kByte) data YRAM

■ ARM7 SUBSYSTEM

32-bit, fixed point, 58MIPS ARM7TDMI core

14kByte data RAM

38kByte program RAM (PRAM)

26kByte program ROM

JTAG/ETM7 real-time debugging Internal Peripheries:

– Direct Memory Access (DMA)

– Asynchronous Serial Interface UART (SCI)

– Synchronous Serial Interfaces BSPI (SPI2)

– 32 multifunctional bidirectional I/O lines (GPIO)

– I2C interface

– Watch Dog (WDOG)

– Wake-up Interrupt Management Unit (WUIMU)

– Timer (EFT)

■ DIGITAL INPUT INTERFACES (SAI1-4, SPDIF)

■ DIGITAL OUTPUT INTERFACES (IBOC, DRM, SAI1-4)

■ ON-BOARD XTAL OSCILLATOR AND PLL

■ CLOCK REFERENCE GENERATION FOR FRONT_END IC

■ EXTERNAL CONTROL INTERFACES (JTAG/ETM7, I2C, SPI1, SPI2, SCI, GPIO)