DESCRIPTION

The 74LVQ174 is a low voltage CMOS HEX D-TYPE FLIP FLOP WITH CLEAR NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.

Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the CLK pulse.

When the CLR input is held low, the Q outputs are held low independently of the other inputs.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:

fMAX = 150 MHz (TYP.) at VCC = 3.3 V

■ COMPATIBLE WITH TTL OUTPUTS

■ LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA=25°C

■ LOW NOISE:

VOLP = 0.3V (TYP.) at VCC = 3.3V

■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 12mA (MIN) at VCC = 3.0 V

■ PCI BUS LEVELS GUARANTEED AT 24 mA

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174

■ IMPROVED LATCH-UP IMMUNITY