PRODUCT DESCRIPTION

The SST49LF020A flash memory device is designed to interface with the LPC bus for PC and Internet Appliance application in compliance with Intel Low Pin Count (LPC) Interface Specification 1.0. Two interface modes are supported: LPC mode for in-system operations and Parallel Programming (PP) mode to interface with programming equipment.

FEATURES:

• LPC Interface Flash

– SST49LF020A: 256K x8 (2 Mbit)

• Conforms to Intel LPC Interface Specification 1.0

• Flexible Erase Capability

– Uniform 4 KByte Sectors

– Uniform 16 KByte overlay blocks

– Top Boot Block protection: 16 KByte

– Chip-Erase for PP Mode Only

• Single 3.0-3.6V Read and Write Operations

• Superior Reliability

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

• Low Power Consumption

– Active Read Current: 6 mA (typical)

– Standby Current: 10 µA (typical)

• Fast Sector-Erase/Byte-Program Operation

– Sector-Erase Time: 18 ms (typical)

– Block-Erase Time: 18 ms (typical)

– Chip-Erase Time: 70 ms (typical)

– Byte-Program Time: 14 µs (typical)

– Chip Rewrite Time: 4 seconds (typical)

– Single-pulse Program or Erase

– Internal timing generation

• Two Operational Modes

– Low Pin Count (LPC) Interface mode for in-system operation

– Parallel Programming (PP) Mode for fast production programming

• LPC Interface Mode

– 5-signal communication interface supporting byte Read and Write

– 33 MHz clock frequency operation

– WP# and TBL# pins provide hardware write protect for entire chip and/or top boot block

– Standard SDP Command Set

– Data# Polling and Toggle Bit for End-of-Write detection

– 5 GPI pins for system design flexibility

– 4 ID pins for multi-chip selection

• Parallel Programming (PP) Mode

– 11-pin multiplexed address and 8-pin data I/O interface

– Supports fast programming In-System on programmer equipment

• CMOS and PCI I/O Compatibility

• Packages Available

– 32-lead PLCC

– 32-lead TSOP (8mm x 14mm)

• All non-Pb (lead-free) devices are RoHS compliant