Description

The CXP913P048 is a CMOS 16-bit microcomputer integrating on a single chip an A/D converter, serial interface with an incorporated buffer RAM, highprecision timing pattern generation function, pulse cycle measurement circuit, PWM generator, generalpurpose prescaler, vertical sync separation circuit, and a measurement circuit which measures the signals of capstan FG, drum FG/PG, reel FG and other servo systems with high precision, as well as basic configurations like a 16-bit CPU, ROM, RAM, and I/O port.

This LSI also provides sleep/stop modes that enable lower power consumption.

The CXP913P048 is the PROM-incorporated version of the CXP913040 with built-in mask ROM. This provides the additional feature of being able to write directly into the program. Thus, it is most suitable for evaluation use during system development and for

small-quantity production.

Features

• An efficient instruction set as a controller

— Direct addressing, numerous abbreviated forms, multiplication and division instructions

• Instruction sets for C language and RTOS

— Highly quadratic instruction system, general-purpose register of 16-bit × 8-pin × 16-bank configuration

• Minimum instruction cycle 100ns at 20MHz operation

• Incorporated ROM capacity 192K bytes

• Incorporated RAM capacity 6144 bytes

• Peripheral functions

— A/D converter 8-bit 12-channel successive approximation system, automatic

scanning function, 8-stage (soft) + 4-stage (hard) FIFO for

conversion results (Conversion time: 20µs at 20MHz)

— Serial interface Buffer RAM (128 bytes, supports high-speed transfer mode),

3 channels

— Timers 8-bit timer/counter + 8-bit timer (with timing output), 1 channel

16-bit capture timer/counter (with timing output), 1 channel

16-bit timer, 4 channels

— High-precision timing pattern generator PPG for 27 pins, 42 stages (max.)

PPG for 16 pins, 16 stages (max.)

RTG for 5 pins, 3 channels

— PWM/DA gate output PWM for 14 bits, 2 channels

(Repetitive frequency of 39.1kHz/20MHz)

DA gate pulse for 14 bits, 2 channels

— Servo input control Capstan FG, drum FG/PG, reel FG

— VSYNC separator

— FRC capture unit 24-bit and 8-stage FIFO

— PWM output 14 bits, 2 channels

— General-purpose prescaler 10 bits, 1 channel

— Pulse cycle measurement circuit 1 channel with mask input

• General-purpose I/O 80 pins

(max.; when all multi-purpose pins are used as general-purpose I/O.)

• Interruption 28 factors, 28 vectors, multi-interruption and priority selection

possible

• Standby mode Sleep/stop

• Package 100-pin plastic LQFP

• Piggy/evaluation chip CXP913000 100-pin ceramic LQFP