Features

 Generates any frequency from 1 to

200 MHz on each of the 4 output banks

 Eight CMOS clock outputs

 Guaranteed 0 ppm frequency synthesis

error for any combination of frequencies

 25 or 27 MHz xtal or 5–200 MHz input clk

 Five programmable control pins (output

enable, frequency select, reset)

 Separate OEB pins to disable individual

banks or all outputs

 Loss of signal output

 Low 50 ps (typ) pk-pk period jitter

 Phase jitter: 2 ps rms 12 kHz–20 MHz

 Excellent PSRR performance

eliminates need for external power

supply filtering

 Low power: 45 mA (core)

 Core VDD: 1.8, 2.5, or 3.3 V

 Separate VDDO for each bank of

outputs: 1.8, 2.5, or 3.3 V

 Small size: 4x4 mm 24-QFN

 Industrial temperature range:

–40 to +85 °C

 Custom versions available using

ClockBuilder™ web utility

 Samples available in 2 weeks