KEY FEATURES

• DRM30 coprocessor

• FAC and SDC decoder

• Multiplex info

• Service list

• Component info

• Service linking info

• Announcement info

• Full support for data services

• Packet mode

• MOT, TPEG packet outputs

• No external RAM required for channel

decoding or seamless blending

• Flash memory interface for application

program load

• Interfaces with Si479xx tuners and

supports Zero-IF DRM30 I/Q at 192 kS/s

• Receives AM/FM audio over I2S to

generate audio output

• Integrated crystal oscillator

• Reference clock input

• SPI or I2C control interface

• LGA 72-pin, 10 x 10 x 1 mm

• Pb-free/RoHS compliant

• AEC-Q100 qualified (A-grade devices)