位置:HYM368025S-50 > HYM368025S-50详情

HYM368025S-50中文资料

厂家型号

HYM368025S-50

文件大小

104.33Kbytes

页面数量

10

功能描述

8M x 36-Bit EDO - DRAM Module

数据手册

下载地址一下载地址二到原厂下载

生产厂商

SIEMENS

HYM368025S-50数据手册规格书PDF详情

The HYM 368025S/GS-50/-60 is a 32 MByte DRAM module organized as 8 388 608 words by 36- Bit in two banks in a 72-pin single-in-line package comprising sixteen HYB 5117405BJ 4M × 4 EDO-DRAMs and eight HYB 514105BJ 4M x 1 EDO-DRAMs in 300 mil wide SOJ-packages mounted together with decoupling capacitors on a PC board.

• SIMM modules with 8 388 608 words by 36-bit organization in two banks for PC main memory applications

• Fast access and cycle time

50 ns access time

84 ns cycle time (-50 version)

60 ns access time

104 ns cycle time (-60 version)

• Hyper Page Mode (EDO) capability

20 ns cycle time (-50 version)

25 ns cycle time (-60 version)

• Single + 5 V (± 10 ) supply

• Low power dissipation

max. 6820 mW active (-50 version)

max. 6160 mW active (-60 version)

CMOS – 132 mW standby

TTL –264 mW standby

• CAS-before-RAS refresh

RAS-only-refresh

Hidden-refresh

• Decoupling capacitors mounted on substrate

• All inputs, outputs and clocks fully TTL compatible

• 72 pin Single in-Line Memory Module (L-SIM-72-14) with 31.75 mm height

• Utilizes sixteen 4Mx4-EDO-DRAMs and eight 4M x 1 EDO-DRAMs in 300 mil wide SOJ packages

• 2048 refresh cycles / 32 ms

• Optimized for use in byte-write parity applications

• Tin-Lead contact pads (S- version)

• Gold contact pads (GS - version)

更新时间:2026-7-30 17:15:00
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