DESCRIPTION

The LH532100B is a 2M-bit mask-programmable ROM organized as 262,144 × 8 bits. It is fabricated using silicon-gate CMOS process technology.

FEATURES

• 262,144 words × 8 bit organization

• Access time: 150 ns (MAX.)

• Low-power consumption:

Operating: 275 mW (MAX.)

Standby: 550 µW (MAX.)

• Static operation

• Mask-programmable OE/OE and OE1/OE1/DC

• TTL compatible I/O

• Three-state outputs

• Single +5 V power supply

• Packages:

32-pin, 600-mil DIP

32-pin, 525-mil SOP

32-pin, 450-mil QFJ (PLCC)

32-pin, 8 × 20 mm2 TSOP (Type I)

32-pin, 400-mil TSOP (Type II)

• JEDEC standard EPROM pinout (DIP)