8-BIT SCANNABLE REGISTER

DESCRIPTION The SY10/100E241 are 8-bit shiftable registers designed for use in new, high-performance ECL systems. Unlike the E141, the E241 features internal data feedback organized such that the SHIFT control overrides the HOLD, /LOAD control. Thus, the normal operations of HOLD and LOAD can be

SY10E241_06 REGISTER

文件：63.21 Kbytes Page：4 Pages

8-BIT SCANNABLE REGISTER

DESCRIPTION The SY10/100E241 are 8-bit shiftable registers designed for use in new, high-performance ECL systems. Unlike the E141, the E241 features internal data feedback organized such that the SHIFT control overrides the HOLD, /LOAD control. Thus, the normal operations of HOLD and LOAD can be

8-BIT SCANNABLE REGISTER

DESCRIPTION The SY10/100E241 are 8-bit shiftable registers designed for use in new, high-performance ECL systems. Unlike the E141, the E241 features internal data feedback organized such that the SHIFT control overrides the HOLD, /LOAD control. Thus, the normal operations of HOLD and LOAD can be

SY10E241_06 REGISTER

文件：63.21 Kbytes Page：4 Pages

8-BIT SCANABLE REGISTER

5V ECL 8-Bit Scannable Register The MC10E/100E241 is an 8-bit shiftable register. Unlike a standard universal shift register such as the E141, the E241 features internal data feedback organized so that the SHIFT control overrides the HOLD/LOAD control. This enables the normal operations of HOLD a