封装/外壳：28-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC CLK BUFFER 2:9 28SOIC 集成电路（IC） 时钟缓冲器，驱动器

SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL

DESCRIPTION The SY100S811 is a low skew 1-to-9 PECL differential driver designed for clock distribution in new, high performance PECL systems. It accepts either a PECL clock input or a TTL input by using the TTL enable pin TEN. When the TTL enable pin is HIGH, the TTL input is enabled and the PEC

SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL

文件：100.89 Kbytes Page：6 Pages

SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL

DESCRIPTION The SY100S811 is a low skew 1-to-9 PECL differential driver designed for clock distribution in new, high performance PECL systems. It accepts either a PECL clock input or a TTL input by using the TTL enable pin TEN. When the TTL enable pin is HIGH, the TTL input is enabled and the PEC

SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL

DESCRIPTION The SY100S811 is a low skew 1-to-9 PECL differential driver designed for clock distribution in new, high performance PECL systems. It accepts either a PECL clock input or a TTL input by using the TTL enable pin TEN. When the TTL enable pin is HIGH, the TTL input is enabled and the PEC

SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL

文件：100.89 Kbytes Page：6 Pages