3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY100EPT23L is a dual differential LVPECL-toLVTTL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The tiny 8-pin MSOP and dual-gate design of the EPT23L makes it ideal for applications which require the translation of a cl

3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

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3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY100EPT23L is a dual differential LVPECL-toLVTTL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The tiny 8-pin MSOP and dual-gate design of the EPT23L makes it ideal for applications which require the translation of a cl

Dual Differential LVPECL to LVTTL Translator

The MC100EPT23 is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the E

Dual Differential LVPECL to LVTTL Translator

The MC100EPT23 is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the E

Dual Differential LVPECL to LVTTL Translator

The MC100EPT23 is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the E