Dual Differential PECL-to-TTL Translator

General Description The SY100ELT23 is a dual differential PECL-to-TTL translator. Because PECL (positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew, dual gate design make the ELT23 ideal for applications that require the transla

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC TRNSLTR UNIDIRECTIONAL 8SOIC 集成电路（IC） 转换器，电平移位器

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

文件：56.45 Kbytes Page：5 Pages

Dual Differential PECL-to-TTL Translator

General Description The SY100ELT23 is a dual differential PECL-to-TTL translator. Because PECL (positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew, dual gate design make the ELT23 ideal for applications that require the transla

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

文件：56.45 Kbytes Page：5 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC TRNSLTR UNIDIRECTIONAL 8SOIC 集成电路（IC） 转换器，电平移位器

5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

Dual Differential PECL to CMOS/TTL Translator

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for application

Dual Differential PECL to CMOS/TTL Translator

DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for applications that require the transla

Dual Differential PECL to CMOS/TTL Translator

文件：409.81 Kbytes Page：6 Pages