封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC CLK BUFFER 2:5 20SOIC 集成电路（IC） 时钟缓冲器，驱动器

1:5 Clock Distribution Chip

Description The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and

1:5 Clock Distribution Chip

Description The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and

5V ECL 1:5 Clock Distribution Chip

文件：122.58 Kbytes Page：8 Pages

5V ECL 1:5 Clock Distribution Chip

文件：122.58 Kbytes Page：8 Pages

5V ECL 1:5 Clock Distribution Chip

文件：122.58 Kbytes Page：8 Pages