3-BIT 4:1 MULTIPLEXER

DESCRIPTION The SY10/100E171 offer three 4:1 multiplexers with differential outputs, designed for use in new, highperformance ECL systems. The leading 4-bit multiplexer operation is organized pairwise, with each pair being a 2- bit multiplexer. FEATURES ■ 725ps max. D to output ■ Extended 100E

3-BIT 4:1 MULTIPLEXER

文件：61.79 Kbytes Page：4 Pages

3-BIT 4:1 MULTIPLEXER

DESCRIPTION The SY10/100E171 offer three 4:1 multiplexers with differential outputs, designed for use in new, highperformance ECL systems. The leading 4-bit multiplexer operation is organized pairwise, with each pair being a 2- bit multiplexer. FEATURES ■ 725ps max. D to output ■ Extended 100E

3-BIT 4:1 MULTIPLEXER

DESCRIPTION The SY10/100E171 offer three 4:1 multiplexers with differential outputs, designed for use in new, highperformance ECL systems. The leading 4-bit multiplexer operation is organized pairwise, with each pair being a 2- bit multiplexer. FEATURES ■ 725ps max. D to output ■ Extended 100E

3-BIT 4:1 MULTIPLEXER

文件：61.79 Kbytes Page：4 Pages

3-BIT 4:1 MULTIPLEXER

Description The MC10E/100E171 contains three 4:1 multiplexers with differential outputs. Separate Select controls are provided for the leading 2:1 MUX pairs (see logic symbol). The three Select inputs control which one of the four data inputs in each case is propagated to the corresponding output

5V ECL 3-Bit 4:1 Multiplexer

文件：126.45 Kbytes Page：8 Pages