9-BIT HOLD REGISTER

DESCRIPTION The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data. FEATURES ■ 700MHz min. operating frequency ■ Extended 100E VEE range of

Flip Flops, Registers Products

The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data.The SEL (Select) control pin serves to determine the mode of operation; either HOLD or LOAD. ·700MHz min. operating frequency\n·Extended 100E VEE range of -4.2V to -5.5V\n·9 bits wide for byte-parity applications\n·Asynchronous Master Reset\n·Dual clocks\n·Fully compatible with industry standard 10KH, 100K ECL levels\n·Internal 75kΩ input pulldown resistors\n·Fully compatible with Motorola ;

9-BIT HOLD REGISTER

文件：62.95 Kbytes Page：4 Pages

9-BIT HOLD REGISTER

DESCRIPTION The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data. FEATURES ■ 700MHz min. operating frequency ■ Extended 100E VEE range of

9-BIT HOLD REGISTER

DESCRIPTION The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data. FEATURES ■ 700MHz min. operating frequency ■ Extended 100E VEE range of

9-BIT HOLD REGISTER

文件：62.95 Kbytes Page：4 Pages

9-BIT HOLD REGISTER

文件：62.95 Kbytes Page：4 Pages

9-BIT HOLD REGISTER

文件：62.95 Kbytes Page：4 Pages

封装/外壳：28-LCC（J 形引线） 功能：通用 包装：管件 描述：IC REGISTER HOLD 9BIT 28PLCC 集成电路（IC） 移位寄存器

9-BIT HOLD REGISTER

文件：62.95 Kbytes Page：4 Pages

封装/外壳：28-LCC（J 形引线） 功能：通用 包装：管件 描述：IC REGISTER HOLD 9BIT 28PLCC 集成电路（IC） 移位寄存器

9-BIT HOLD REGISTER

Description The MC10E/100E143 is a 9-bit holding register, designed with byte-parity applications in mind. The E143 holds current data or loads new data, with the nine inputs D0 − D8 accepting parallel input data. The SEL (Select) input pin is used to switch between the two modes of operation −

5V ECL 9-Bit Hold Register

文件：128.13 Kbytes Page：8 Pages