基于AES-128 算法的加密芯片

SW2001 是SW200X 系列中一款基于AES-128 算法的加密芯片，旨在保护知识产权，防止被非法拷贝。芯片内部提供56 bits 可编程的Chip ID, 用来帮助客户进行授权管理。SW2001使用两线串行接口，主处理器可以通过此总线对其进行访问。 ☆ 对称加密算法: AES-128 算法\r\n☆ 串行接口速率高达400KHz\r\n☆ 56 bits Chip ID\r\n☆ 小于20μA@3.3v 的待机电流\r\n☆ 2.8V-5.5V 工作电压\r\n☆ 小型SOT23-6 6L 封装\r;

包装：盒 描述：SWITCH RF/IF，射频/中频和 RFID 射频开关

SW20XX-EX Isolating Switching Barrier

文件：68.63 Kbytes Page：2 Pages

256KB Asynchronous Secondary Cache Module for PowerPC

The MPC2001 is designed to provide asynchronous 256KB L2 cache for the PowerPC 60x processors. The module is configured as 32K x 64 bits in a 136 pin dual readout single inline memory module (DIMM). The module uses eight of Motorola’s MCM6206 CMOS RAMs. Eight write enables are provided for byte w

900 MHz DOWNCONVERTER LNA/MIXER SILICON MONOLITHIC INTEGRATED CIRCUIT

The MRFIC2001 is an integrated downconverter designed for receivers operating in the 800 MHz to 1.0 GHz frequency range. The design utilizes Motorola’s advanced MOSAIC 3 silicon bipolar RF process to yield superior performance in a cost effective monolithic device. Applications for the MRFIC2001 i

MICROWAVE POWER TRANSISTORS

The RF Line Microwave Power Transistors Designed primarily for large–signal output and driver amplifier stages in the 1.0 to 2.3 GHz frequency range. • Designed for Class B or C, Common Base Power Amplifiers • Specified 28 Volt, 2.0 GHz Characteristics: Output Power — 1.0 to 20 Watts P

High Precision, 6MHz Rail-To-Rail Output Operational Amplifier

文件：430.08 Kbytes Page：11 Pages

High Precision, 6MHz Rail-To-Rail Output Operational Amplifier

文件：430.08 Kbytes Page：11 Pages