STM8AF6248价格

参考价格:¥14.7663

型号:STM8AF6248TCY 品牌:STM 备注:这里有STM8AF6248多少钱,2025年最近7天走势,今日出价,今日竞价,STM8AF6248批发/采购报价,STM8AF6248行情走势销售排行榜,STM8AF6248报价。
型号 功能描述 生产厂家 企业 LOGO 操作
STM8AF6248

Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Introduction This datasheet refers to the STM8AF61xx (STM8AF612x, STM8AF614x, STM8AF6166, and STM8AF6168) and STM8AF62xx products with 16 to 32 Kbytes of Flash program memory. In the order code, the letter ‘F’ refers to product versions with data EEPROM and ‘H’ refers to product versions without

STMICROELECTRONICS

意法半导体

STM8AF6248

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

STM8AF6248

汽车级8位MCU,具有16 KB Flash、LIN、16 MHz CPU和集成EEPROM

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

STM8AF6248产品属性

  • 类型

    描述

  • 型号

    STM8AF6248

  • 制造商

    STMICROELECTRONICS

  • 制造商全称

    STMicroelectronics

  • 功能描述

    Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

更新时间:2025-12-30 8:49:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
STMicroelectronics
24+
只做原装
5850
进口原装假一赔百,现货热卖
ST(意法半导体)
2021+
LQFP-48
499
ST/意法
15+
LQFP48
1500
A3-7货柜原装正品支持实单
ST/意法
22+
LQFP-48
5580
原装现货
ST/意法
21+
QFP
1500
STMicroelectronics
21+
100-LQFP
5680
100%进口原装!长期供应!绝对优势价格(诚信经营
ST/意法
23+
LQFP48
98900
原厂原装正品现货!!
ST/意法
22+
QFP48
100000
代理渠道/只做原装/可含税
ST/意法
24+
NA/
5084
优势代理渠道,原装正品,可全系列订货开增值税票
ST(意法半导体)
24+
LQFP-48(7x7)
2599
深耕行业12年,可提供技术支持。

STM8AF6248数据表相关新闻

  • STM8AF6223PDU

    STM8AF6223PDU

    2023-4-11
  • STM8AF6223IPCX 8位微控制器 -MCU

    STM8AF6223IPCX 8位微控制器 -MCU 8 BITS MICROCONTR

    2023-2-24
  • STM8AF6388TCX

    全新原装现货 支持第三方机构验证

    2022-6-28
  • STM8AF6223PCAX

    公司原装正品 现货库存 价格优势

    2022-5-5
  • STM8AF6266TCX

    品  牌: ST(意法半导体) 厂家型号: STM8AF6266TCX 商品编号: C194006 封装: LQFP-32 数据手册: 下载文件 商品毛重: 0.927克(g) 包装方式: 编带

    2021-9-23
  • STM8L051F3P6 ST支持实单 TSSOP20

    深圳市拓亿芯电子有限公司,专业代理,分销世界名牌电子元器件,质量第一,诚信经营,货源渠道保证原厂原装正品,本公司具备一般纳税人,可开13点增值税票,0755-82702619 QQ:2924695115

    2021-9-22