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STM8AF6248价格

参考价格:¥14.7663

型号:STM8AF6248TCY 品牌:STM 备注:这里有STM8AF6248多少钱,2026年最近7天走势,今日出价,今日竞价,STM8AF6248批发/采购报价,STM8AF6248行情走势销售排行榜,STM8AF6248报价。
型号 功能描述 生产厂家 企业 LOGO 操作
STM8AF6248

Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Introduction This datasheet refers to the STM8AF61xx (STM8AF612x, STM8AF614x, STM8AF6166, and STM8AF6168) and STM8AF62xx products with 16 to 32 Kbytes of Flash program memory. In the order code, the letter ‘F’ refers to product versions with data EEPROM and ‘H’ refers to product versions without

STMICROELECTRONICS

意法半导体

STM8AF6248

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

STM8AF6248

汽车级8位MCU,具有16 KB Flash、LIN、16 MHz CPU和集成EEPROM

The STM8AF6246, STM8AF6248, STM8AF6266 and STM8AF6268 automotive 8-bit microcontrollers offer from 16 to 32 Kbyte of Flash program memory and integrated true data EEPROM. They are referred to as medium density STM8A devices in STM8S series and STM8AF series 8-bit microcontrollers reference manual (R • AEC-Q10x qualified \n• 内核 \n •Max fCPU: 16 MHz \n •Advanced STM8A core with Harvard architecture and 3-stage pipeline \n •Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPUfor industry standard benchmark \n• Memories \n •Flash Program memory: 16 to 32 Kbyte Flash; data retention 20;

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

STM8AF6248产品属性

  • 类型

    描述

  • Marketing Status:

    Active

  • Package:

    LQFP 48 7x7x1.4

  • Operating Frequency(MHz):

    16

  • Flash Size(Prog)(kB):

    16

  • RAM Size(kB):

    2

  • Data E2PROM_nom(B):

    512

  • Timers_typ(8-bit):

    1

  • Timers_typ(16-bit):

    3

  • Other timer functions:

    IWDG

  • Number of A/D Converters(10-bit Channels):

    10

  • I/Os (High Current):

    38

  • I2C_typ:

    1

  • SPI_typ:

    1

  • UART_typ:

    1

  • LIN-UART_typ:

    1

  • Supply Voltage_min(V):

    3

  • Supply Voltage_max(V):

    5.5

  • Supply Current_typ(@ Lowest Power)(µA):

    5

  • Supply Current_typ(Run mode (per Mhz))(µA):

    430

  • Operating Temperature_min(°C):

    -40

  • Operating Temperature_max(°C):

    125

更新时间:2026-8-1 10:11:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Eaton
24+
BUSS KNOB ASSEMBLY
10000
低于市场价,实单必成,QQ1562321770
80000
ST/意法原装正品
26+
LQFP48
15000
全新原装正品,价格优势,长期供应,量大可订
ST
23+
QFP
50000
全新原装正品现货,支持订货
ST
2025+
N/A
70000
柒号只做原装 现货价秒杀全网
正纳电子热销
26+
NA
26094
10年以上分销经验原装进口正品,做服务型企业
ST/意法
2021+
QFP
9000
原装现货,随时欢迎询价
TE
2026+
SMT
300000
济德93T0-04810替代STM00911500PCQ
23+
11200
原厂授权一级代理、全球订货优势渠道、可提供一站式BO
ST/意法
2025+
QFP48
984
原装进口价格优 请找坤融电子!

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