Cool MOS??Power Transistor

Feature • New revolutionary high voltage technology • Ultra low gate charge • Periodic avalanche rated • Extreme dv/dt rated • Ultra low effective capacitances • Improved transconductance • P-TO-220-3-31: Fully isolated package (2500 VAC; 1 minute)

N-Channel 650 V (D-S) MOSFET

FEATURES • Reduced trr, Qrr, and IRRM • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Low switching losses due to reduced Qrr • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) APPLICATIONS • Telecommunications - Server and telecom power supplies • Light

New revolutionary high voltage technology Worldwide best RDS(on) in TO 220 Ultra low gate charge

文件：1.69996 Mbytes Page：12 Pages

N-Channel 650 V (D-S) MOSFET

FEATURES • Reduced trr, Qrr, and IRRM • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Low switching losses due to reduced Qrr • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) APPLICATIONS • Telecommunications - Server and telecom power supplies • Light

New revolutionary high voltage technology Worldwide best RDS(on) in TO 220 Ultra low gate charge

文件：1.69996 Mbytes Page：12 Pages

Cool MOS Power Transistor

Feature • New revolutionary high voltage technology • Ultra low gate charge • Periodic avalanche rated • Extreme dv/dt rated • Ultra low effective capacitances • Improved transconductance • Pb-free lead plating; RoHS compliant • Qualified according to JEDEC0) for target applications

N-Channel MOSFET Transistor

• DESCRITION • New revolutionary high voltage technology • Ultra low effective capacitance • FEATURES • Static drain-source on-resistance: RDS(on) ≤0.6Ω • Enhancement mode • Fast Switching Speed • 100 avalanche tested • Minimum Lot-to-Lot variations for robust device performance an

N-Channel MOSFET Transistor

• DESCRITION • New revolutionary high voltage technology • Ultra low effective capacitance • FEATURES • Static drain-source on-resistance: RDS(on) ≤0.6Ω • Enhancement mode • Fast Switching Speed • 100 avalanche tested • Minimum Lot-to-Lot variations for robust device performance an

isc N-Channel MOSFET Transistor

• DESCRITION • Improved Transconductance • FEATURES • Static drain-source on-resistance: RDS(on)≤380mΩ • Enhancement mode: • 100 avalanche tested • Minimum Lot-to-Lot variations for robust device performance and reliable operation

N-Channel 650 V (D-S) MOSFET

文件：1.03243 Mbytes Page：8 Pages