25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS

文件：352.72 Kbytes Page：20 Pages

封装/外壳：96-LFBGA 包装：管件 描述：IC 25BIT CONFIG REG BUFF 96LFBGA 集成电路（IC） 专用逻辑器件

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

文件：139.25 Kbytes Page：12 Pages

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

文件：179.41 Kbytes Page：12 Pages

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

文件：139.25 Kbytes Page：12 Pages