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SN74SSTU32864价格
参考价格：￥70.6912
型号：SN74SSTU32864CZKER 品牌：TI 备注：这里有SN74SSTU32864多少钱，2025年最近7天走势，今日出价，今日竞价，SN74SSTU32864批发/采购报价，SN74SSTU32864行情走势销售排行榜，SN74SSTU32864报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74SSTU32864 | 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption Output Edge-Control Circuitry Minimizes S | TI 德州仪器 |   | |
SN74SSTU32864 | 具有 SSTL_18 输入和输出的 500MHz、25 位可配置寄存缓冲器 | TI 德州仪器 | | |
SN74SSTU32864 | 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：389.83 Kbytes Page：14 Pages | TI 德州仪器 | | |
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption Output Edge-Control Circuitry Minimizes S | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption Output Edge-Control Circuitry Minimizes S | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption Output Edge-Control Circuitry Minimizes S | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：567.8 Kbytes Page：20 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS 文件：304.96 Kbytes Page：18 Pages | TI 德州仪器 | | ||
具有 SSTL_18 输入和输出的 25 位可配置寄存缓冲器 | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS 文件：304.96 Kbytes Page：18 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS 文件：304.96 Kbytes Page：18 Pages | TI 德州仪器 | | ||
封装/外壳：96-LFBGA 包装：管件 描述：IC 25BIT CONFIG REG BUFF 96-BGA 集成电路（IC） 专用逻辑器件 | TI2 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：352.72 Kbytes Page：20 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：352.72 Kbytes Page：20 Pages | TI 德州仪器 | | ||
封装/外壳：96-LFBGA 包装：管件 描述：IC 25BIT CONFIG REG BUFF 96LFBGA 集成电路（IC） 专用逻辑器件 | TI2 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：352.72 Kbytes Page：20 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：389.83 Kbytes Page：14 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：567.8 Kbytes Page：20 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：567.8 Kbytes Page：20 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：567.8 Kbytes Page：20 Pages | TI 德州仪器 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS 文件：389.83 Kbytes Page：14 Pages | TI 德州仪器 | | ||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | | ||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | | ||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O 文件：139.25 Kbytes Page：12 Pages | IDT | | ||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O 文件：179.41 Kbytes Page：12 Pages | IDT | | ||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O 文件：139.25 Kbytes Page：12 Pages | IDT | |
SN74SSTU32864产品属性
- 类型
描述
- 型号
SN74SSTU32864
- 功能描述
寄存器 25-Bit Configurable Registered Buffer
- RoHS
否
- 制造商
NXP Semiconductors
- 逻辑类型
CMOS
- 逻辑系列
HC
- 电路数量
1
- 最大时钟频率
36 MHz
- 高电平输出电流
- 7.8 mA
- 低电平输出电流
7.8 mA
- 电源电压-最大
6 V
- 最大工作温度
+ 125 C
- 封装/箱体
SOT-38
- 封装
Tube
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
BGA96 |
1612 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI/德州仪器 |
24+ |
NA/ |
4250 |
原厂直销,现货供应,账期支持! |
|||
TI |
2016+ |
BGA |
3483 |
本公司只做原装,假一罚十,可开17%增值税发票! |
|||
TI |
23+ |
BGA |
20000 |
全新原装假一赔十 |
|||
TI/德州仪器 |
25+ |
LFBGA96 |
32360 |
TI/德州仪器全新特价SN74SSTU32864CZKER即刻询购立享优惠#长期有货 |
|||
TI/德州仪器 |
21+ |
NA |
12820 |
只做原装,质量保证 |
|||
TI(德州仪器) |
2024+ |
BGA-96 |
500000 |
诚信服务,绝对原装原盘 |
|||
TI |
三年内 |
1983 |
只做原装正品 |
||||
TI |
23+ |
BGA |
3200 |
正规渠道,只有原装! |
|||
TI |
23+ |
BGA |
10500 |
全新原装现货,假一赔十 |
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SN74SSTU32864规格书下载地址
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瀚佳科技（深圳）有限公司 专业进口电子元器件代理商
2019-9-12
DdatasheetPDF页码索引
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