SN74LVC1G123 Single Retriggerable Monostable Multivibrator With Schmitt-Trigger Inputs

1 Features • Available in the Texas Instruments NanoFree™ Package • Supports 5V VCC Operation • Inputs Accept Voltages to 5.5V • Max tpd of 8ns at 3.3V • Supports Mixed-Mode Voltage Operation on All Ports • Supports Down Translation to VCC • Schmitt-Trigger Circuitry on A and B Inputs for

SN74LVC1G123 Single Retriggerable Monostable Multivibrator With Schmitt-Trigger Inputs

1 Features • Available in the Texas Instruments NanoFree™ Package • Supports 5V VCC Operation • Inputs Accept Voltages to 5.5V • Max tpd of 8ns at 3.3V • Supports Mixed-Mode Voltage Operation on All Ports • Supports Down Translation to VCC • Schmitt-Trigger Circuitry on A and B Inputs for

SN74LVC1G123 Single Retriggerable Monostable Multivibrator With Schmitt-Trigger Inputs

1 Features • Available in the Texas Instruments NanoFree™ Package • Supports 5V VCC Operation • Inputs Accept Voltages to 5.5V • Max tpd of 8ns at 3.3V • Supports Mixed-Mode Voltage Operation on All Ports • Supports Down Translation to VCC • Schmitt-Trigger Circuitry on A and B Inputs for

SN74LVC1G123 Single Retriggerable Monostable Multivibrator With Schmitt-Trigger Inputs

1 Features • Available in the Texas Instruments NanoFree™ Package • Supports 5V VCC Operation • Inputs Accept Voltages to 5.5V • Max tpd of 8ns at 3.3V • Supports Mixed-Mode Voltage Operation on All Ports • Supports Down Translation to VCC • Schmitt-Trigger Circuitry on A and B Inputs for

SN74LVC1G123 Single Retriggerable Monostable Multivibrator With Schmitt-Trigger Inputs

1 Features • Available in the Texas Instruments NanoFree™ Package • Supports 5V VCC Operation • Inputs Accept Voltages to 5.5V • Max tpd of 8ns at 3.3V • Supports Mixed-Mode Voltage Operation on All Ports • Supports Down Translation to VCC • Schmitt-Trigger Circuitry on A and B Inputs for

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output

1 Features • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device Human-Body Model (HBM) ESD Classification Level 2 – Device Charged-Device Model (CDM) ESD Classification Level C5 • Available in the small

SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output

1 Features • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device Human-Body Model (HBM) ESD Classification Level 2 – Device Charged-Device Model (CDM) ESD Classification Level C5 • Available in the small

This users guide describes the characteristics, operation, and use of the TLV320AIC3204EVM-K.

Features • Full-featured evaluation board for the TLV320AIC3204 stereo audio codec. • USB connection to PC provides power, control, and streaming audio data for easy evaluation. • Onboard microphone for ADC evaluation • Connection points for external control and digital audio signals for quick

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G125 is a high performance non−inverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Overvol

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G125 is a high performance non−inverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Overvol

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G125 is a high performance non−inverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Overvol

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G125 is a high performance non−inverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Overvol

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output

1 Features • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device Human-Body Model (HBM) ESD Classification Level 2 – Device Charged-Device Model (CDM) ESD Classification Level C5 • Available in the small

SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output

1 Features • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device Human-Body Model (HBM) ESD Classification Level 2 – Device Charged-Device Model (CDM) ESD Classification Level C5 • Available in the small

SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output

1 Features • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device Human-Body Model (HBM) ESD Classification Level 2 – Device Charged-Device Model (CDM) ESD Classification Level C5 • Available in the small

SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output

1 Features • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device Human-Body Model (HBM) ESD Classification Level 2 – Device Charged-Device Model (CDM) ESD Classification Level C5 • Available in the small

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

Features «Supply Voltage Range from 20V to 5.5V + +8mA Output Drive at 5.0V. + CMOS low power consumption «Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time + ESD Protection per JESD 22 o Exceeds 200-V Machine Model (A115-A) 0 Exceeds 2000-V

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

SN74LVC1G126-Q1 Single Bus Buffer Gate With 3-State Output

1 Features • Qualified for automotive applications • Supports 5-V VCC operation • Inputs accept voltages to 5.5 V • Provides down translation to VCC • Low power consumption, 10-μA Max ICC • ±24-mA Output drive at 3.3 V • Ioff Supports live insertion, partial-power-down mode, and back drive

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G126 is a high performance single noninverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Ov

PurePath Digital™ 5.1 Channel Evaluation Module for the TAS5508 Digital Audio PWM processor and TAS5122DCA Digital Amplifier Power Output Stage in Both Bridge-Tied-Load and Single-Ended Configuration

PurePath Digital™ 5.1 Channel Evaluation Module for the TAS5508 Digital Audio PWM processor and TAS5122DCA Digital Amplifier Power Output Stage in Both Bridge-Tied-Load and Single-Ended Configuration

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G126 is a high performance single noninverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Ov

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

Features «Supply Voltage Range from 20V to 5.5V + +8mA Output Drive at 5.0V. + CMOS low power consumption «Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time + ESD Protection per JESD 22 o Exceeds 200-V Machine Model (A115-A) 0 Exceeds 2000-V

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G126 is a high performance single noninverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Ov

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

BUS BUFFER/LINE DRIVER 3-STATE

Features » Operate from 1.65V to 5.5V » Inputs Accept Voltages to 5.5V » High Noise Immunity » Low Power Dissipation « ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) ~1000-V Charged-Device Model (C101) » SOT353 Package Available

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

Features «Supply Voltage Range from 20V to 5.5V + +8mA Output Drive at 5.0V. + CMOS low power consumption «Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time + ESD Protection per JESD 22 o Exceeds 200-V Machine Model (A115-A) 0 Exceeds 2000-V

SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse