SN74LVC10A Triple 3-Input Positive-NAND Gate

1 Features • Operates from 1.65V to 3.6V • Specified from –40°C to 85°C and –40°C to 125°C • Inputs accept voltages to 5.5V • Max tpd of 4.9ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C

Triple 3-input NAND gate

DESCRIPTION The 74LVC10 is a high performance, low power, low voltage, Si gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC10 provides the 3-input NAND function. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standar

Triple 3-input NAND gate

DESCRIPTION The 74LVC10A is a high performance, low power, low voltage, Si gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC10A provides the 3-input NAND function. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard n

Triple 3-input NAND gate

1. General description The 74LVC10A provides three 3-input NAND functions. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. 2. Features and benefits • Wide supply voltage range from 1.2 V to

Triple 3-input NAND gate

1. General description The 74LVC10A provides three 3-input NAND functions. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. 2. Features and benefits • Wide supply voltage range from 1.2 V to

Triple 3-input NAND gate

DESCRIPTION The 74LVC10A is a high performance, low power, low voltage, Si gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC10A provides the 3-input NAND function. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard n