SN74LV595A 8-Bit Shift Registers With 3-State Output Registers

1 Features • 2-V to 5.5-V VCC Operation • Max tpd of 7.1 ns at 5 V • Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Support Mixed-Mode Voltage Operation on All Ports • 8-Bit Serial-In, Parall

SN74LV595A-Q1 8-Bit Shift Registers With 3-State Output Registers

1 Features • Qualified for automotive applications • Available in wettable flank QFN (WBQB) package • Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval • 2-V to 5.5-V VCC Operation • Typical VOLP (Output Ground Bounce)

SN74LV595A-Q1 8-Bit Shift Registers With 3-State Output Registers

1 Features • Qualified for automotive applications • Available in wettable flank QFN (WBQB) package • Customer-specific configuration control can be supported along with major-change approval • 2-V to 5.5-V VCC operation • Typical VOLP (output ground bounce)

SN74LV595A 8-Bit Shift Registers With 3-State Output Registers

1 Features • 2-V to 5.5-V VCC operation • Maximum tpd of 7.1 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Support mixed-mode voltage operation on all ports • 8-bit serial-in, par

8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS

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8-Bit Shift Registers With 3-State Output Registers

文件：1.16663 Mbytes Page：30 Pages

8-bit serial-in/serial or parallel-out shift register with output latches 3-State

DESCRIPTION The 74LV595 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT595. FEATURES • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (output ground bounce)

8-bit serial-in/serial-out or parallel-out shift register; 3-state

1. General description The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asyn

8-bit serial-in/serial or parallel-out shift register with output latches 3-State

DESCRIPTION The 74LV595 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT595. FEATURES • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (output ground bounce)

8-bit serial-in/serial-out or parallel-out shift register; 3-state

1. General description The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asyn

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：755.02 Kbytes Page：22 Pages