OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Inputs Are TTL-Voltage Compatible · 4.5-V to 5.5-V V CC Operation · Typical tpd = 5.1 ns at 5 V · Typical V OLP (Output Ground Bounce) 2.3 V at VCC = 5 V, TA = 25°C · Supports Mixed-Mode Voltage Operation on

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC OCTAL LATCH 3ST 20SO 集成电路（IC） 锁存器

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件：756.91 Kbytes Page：19 Pages

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC D-TYPE LATCH SGL 3-ST 20SO 集成电路（IC） 锁存器

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV573 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT573. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV573 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT573. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV573 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT573. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV573 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT573. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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