OCTAL BUS TRANSCEIVRS

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封装/外壳：20-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC TXRX INVERT 5.25V 20SSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

OCTAL BUS TRANSCEIVRS

文件：1.29805 Mbytes Page：25 Pages

OCTAL BUS TRANSCEIVRS

文件：1.29805 Mbytes Page：25 Pages

OCTAL BUS TRANSCEIVERS

OCTAL BUS TRANSCEIVERS These octal bus transceivers are designed for asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmis sion from the A bus to B or from the B bus to A bus depending

OCTAL BUS TRANSCEIVERS

OCTAL BUS TRANSCEIVERS These octal bus transceivers are designed for asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmis sion from the A bus to B or from the B bus to A bus depending

Octal Bus Transceivers (inverted 3-state outputs)

Octal Bus Transceivers (inverted 3-state outputs) This octal bus transceivers is designed for asynchronous two-way communication between data buses. The device transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. T

Octal Bus Transceivers(inverted 3-state outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Ouadruple 2-input Positive NAND Gates

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