DIGITAL PHASE-LOCKED-LOOP FILTERS

Digital Design Avoids Analog Compensation Errors Easily Cascadable for Higher Order Loops Useful Frequency from DC to: 50 MHz Typical (K Clock) 35 MHz Typical (I/D Clock)

数字锁相环滤波器

The SN54LS297 and SN74LS297 devices are designed to provide a simple, cost-effective solution to high-accuracy, digital, phase-locked-loop applications. These devices contain all the necessary circuits, with the exception of the divide-by-N counter, to build first order phase-locked loops as describ • Digital Design Avoids Analog Compensation Errors• Easily Cascadable for Higher Order Loops• Useful Frequency from DC to:• 50 MHz Typical (K Clock)• 35 MHz Typical (I/D Clock);

DIGITAL PHASE-LOCKED-LOOP FILTERS

文件：307.7 Kbytes Page：7 Pages

DIGITAL PHASE-LOCKED-LOOP FILTERS

文件：513.049 Kbytes Page：15 Pages

丝印代码：SN74LS297N；DIGITAL PHASE-LOCKED-LOOP FILTERS

Digital Design Avoids Analog Compensation Errors Easily Cascadable for Higher Order Loops Useful Frequency from DC to: 50 MHz Typical (K Clock) 35 MHz Typical (I/D Clock)

丝印代码：SN74LS297N；DIGITAL PHASE-LOCKED-LOOP FILTERS

Digital Design Avoids Analog Compensation Errors Easily Cascadable for Higher Order Loops Useful Frequency from DC to: 50 MHz Typical (K Clock) 35 MHz Typical (I/D Clock)

封装/外壳：16-DIP（0.300"，7.62mm） 包装：管件 描述：IC DIG PLL FILTER 16-DIP 集成电路（IC） 专用逻辑器件

DIGITAL PHASE-LOCKED-LOOP FILTERS

文件：307.7 Kbytes Page：7 Pages

DIGITAL PHASE-LOCKED-LOOP FILTERS

文件：513.049 Kbytes Page：15 Pages

DIGITAL PHASE-LOCKED-LOOP FILTERS

文件：513.049 Kbytes Page：15 Pages