HEX SCHMITT-TRIGGER INVERTERS

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HEX SCHMITT-TRIGGER INVERTERS

文件：636.32 Kbytes Page：18 Pages

HEX SCHMITT-TRIGGER INVERTERS

文件：562.94 Kbytes Page：20 Pages

HEX SCHMITT-TRIGGER INVERTERS

文件：686.68 Kbytes Page：19 Pages

HEX SCHMITT-TRIGGER INVERTERS

文件：636.32 Kbytes Page：18 Pages

HEX SCHMITT-TRIGGER INVERTERS

文件：562.94 Kbytes Page：20 Pages

封装/外壳：14-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC INV SCHMITT 6CH 1-IN 14SSOP 集成电路（IC） 门和反相器

HEX SCHMITT-TRIGGER INVERTERS

文件：562.94 Kbytes Page：20 Pages

HEX SCHMITT-TRIGGER INVERTERS

文件：636.32 Kbytes Page：18 Pages

HEX SCHMITT-TRIGGER INVERTERS

文件：636.32 Kbytes Page：18 Pages

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

HEX SCHMITT INVERTER

DESCRIPTION The M54/74HCT14 is a high speed CMOS HEX SCHMITT INVERTER fabricated in silicon gate C2MOS technology. It has the same highspeed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are the same as those of the HCT04 but all inputs have

Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs

Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT14A may be used as a level converter for interfacing TTL or NMOS outputs to high−speed CMOS inputs. The HCT14A is useful to “square up” slow input rise and fall times. Due to the hystere

Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs

Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT14A may be used as a level converter for interfacing TTL or NMOS outputs to high−speed CMOS inputs. The HCT14A is useful to “square up” slow input rise and fall times. Due to the hystere

10-to-4 line priority encoder

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in