DUALD-TYPEPOSITIVEEDGETRIGGEREDFLIP-FLOPWITHCLEARANDPRESET

1FEATURES ·ControlledBaseline –OneAssemblySite –OneTestSite –OneFabricationSite ·ExtendedTemperaturePerformanceof–55°C to125°C ·EnhancedDiminishingManufacturingSources (DMS)Support ·EnhancedProduct-ChangeNotification ·QualificationPedigree(1) ·WideOperating

SN74HC74-Q1AutomotiveQualifiedDualD-TypePositive-Edge-TriggeredFlip-FlopsWithClearandPreset

1Features 1•AEC-Q100Qualifiedforautomotiveapplications: –Devicetemperaturegrade1: –40°Cto+125°C,TA •Bufferedinputs •Positiveandnegativeinputclampdiodes •Wideoperatingvoltagerange:2Vto6V •Supportsfanoutupto10LSTTLloads •Significantpowerreductioncompa

DUALD-TYPEPOSITIVE-EDGE-TRIGGEREDFLIP-FLOPWITHCLEARANDPRESET

文件：828.97 Kbytes Page：14 Pages

DUALD-TYPEPOSITIVEEDGETRIGGEREDFLIP-FLOPWITHCLEARANDPRESET

文件：600.08 Kbytes Page：12 Pages

DualDFlip?묯lopwithSetandResetHigh?뭁erformanceSilicon?묰ateCMOS

The74HC74isidenticalinpinouttotheLS74.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLSTTLoutputs. ThisdeviceconsistsoftwoDflip−flopswithindividualSet,Reset,andClockinputs.InformationataD−inputistransferred

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

GENERALDESCRIPTION The74HC/HCT74arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Outputcapability:standard •ICCcategory:flip-flops

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

1.Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividual data(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs. DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-

HighSpeedCMOSLogic

文件：467.12 Kbytes Page：6 Pages

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

文件：175.47 Kbytes Page：21 Pages