8-BIT PARALLEL-LOAD SHIFT REGISTER

Qualified for Automotive Applications ESD Protection Exceeds 1500 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-μA Max ICC Typical tpd = 13 ns

8-BIT PARALLEL-LOAD SHIFT REGISTER

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8-BIT PARALLEL-LOAD SHIFT REGISTER

文件：632.81 Kbytes Page：16 Pages

8-bit parallel-in/serial-out shift register

GENERAL DESCRIPTION The 74HC/HCT165 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Asynchronous 8-bit parallel load • Synchronous serial input • Output capability: standard

8-bit parallel-in/serial out shift register

8-bit parallel-in/serial out shift register

1. General description The 74HC165; 74HCT165 are 8-bit serial or parallel-in/serial-out shift registers. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the data from D

8-bit parallel-in/serial out shift register

8-bit parallel-in/serial out shift register

1. General description The 74HC165; 74HCT165 are 8-bit serial or parallel-in/serial-out shift registers. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the data from D