QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 15 LSTTL Loads Low Power Consumption, 80-μA Max ICC Typical tpd = 11 ns ±6-mA Output Drive at 5 V Low Input Current of 1 μA Max description/ordering information These data selectors/multiplexers contain inverters and drive

Quad 2-input multiplexer; inverting

1. General description The 74HC158 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC158 is specified in compliance with JEDEC standard no. 7A. The 74HC158 is a quad 2-input multiplexer which select 4 bits of data from two sources and are c

Quad 2-input multiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting data path • Output capability: standard • ICC category: MSI

High Speed CMOS Logic Quad 2-Input Multiplexers

Description The Harris CD74HC157, CD74HCT157, CD74HC158 and CD74HCT158 are quad 2-input multiplexers which select four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active Low. When (E) is High, all of the outputs in the 158, the inverting t

Quad 2-input multiplexer; inverting

1. General description The 74HC158 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC158 is specified in compliance with JEDEC standard no. 7A. The 74HC158 is a quad 2-input multiplexer which select 4 bits of data from two sources and are c

Quad 2-input multiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting data path • Output capability: standard • ICC category: MSI