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SN74GTLP1394价格
参考价格：￥12.2973
型号：SN74GTLP1394D 品牌：Texas 备注：这里有SN74GTLP1394多少钱，2025年最近7天走势，今日出价，今日竞价，SN74GTLP1394批发/采购报价，SN74GTLP1394行情走势销售排行榜，SN74GTLP1394报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74GTLP1394 | 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 |   | |
SN74GTLP1394 | 具有独立 LVTTL 端口、反馈路径和可选择极性的 2 位 LVTTL 到 GTLP 可调节边沿速率总线收发器 | TI 德州仪器 | | |
SN74GTLP1394 | 2-BIT LVTTL-TO-GTL ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SELECTABLE POLARITY 文件：143.1 Kbytes Page：9 Pages | TI 德州仪器 | | |
SN74GTLP1394 | 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | | |
SN74GTLP1394 | 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | |
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTL ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SELECTABLE POLARITY 文件：143.1 Kbytes Page：9 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTL ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SELECTABLE POLARITY 文件：143.1 Kbytes Page：9 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
封装/外壳：16-TFSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC TRNSLTR BIDIRECTIONAL 16TVSOP 集成电路（IC） 转换器，电平移位器 | TI 德州仪器 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC TRNSLTR BIDIRECTIONAL 16SOIC 集成电路（IC） 转换器，电平移位器 | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTL ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SELECTABLE POLARITY 文件：143.1 Kbytes Page：9 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：890.49 Kbytes Page：23 Pages | TI 德州仪器 | | ||
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY 文件：741.04 Kbytes Page：25 Pages | TI 德州仪器 | |
SN74GTLP1394产品属性
- 类型
描述
- 型号
SN74GTLP1394
- 功能描述
转换 - 电压电平 2-Bit LVTTL/GTLP Bus Xcvr Adj-Edge-Rate
- RoHS
否
- 制造商
Micrel
- 类型
CML/LVDS/LVPECL to LVCMOS/LVTTL
- 传播延迟时间
1.9 ns
- 电源电流
14 mA
- 电源电压-最大
3.6 V
- 电源电压-最小
3 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
MLF-8
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
20+ |
NA |
53650 |
TI原装主营-可开原型号增税票 |
|||
TEXAS |
24+ |
TSSOP |
20000 |
全新原厂原装，进口正品现货，正规渠道可含税！！ |
|||
TI/德州仪器 |
2023+ |
TSSOP16 |
6895 |
原厂全新正品旗舰店优势现货 |
|||
TI/德州仪器 |
24+ |
NA/ |
3457 |
原厂直销,现货供应,账期支持! |
|||
TI(德州仪器) |
24+ |
SOP16 |
935 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI |
23+ |
TSSOP |
50000 |
只做原装正品 |
|||
TI/德州仪器 |
23+ |
TSSOP16 |
30000 |
原装现货,假一赔十. |
|||
TI/德州仪器 |
22+ |
TVSOP16 |
12245 |
现货,原厂原装假一罚十! |
|||
TI |
25+23+ |
TSSOP16 |
54607 |
绝对原装正品现货,全新深圳原装进口现货 |
|||
TI |
24+ |
16-SOIC |
26200 |
原装现货,诚信经营! |
SN74GTLP1394芯片相关品牌
SN74GTLP1394规格书下载地址
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SN74GTLP1394数据表相关新闻
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