LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：81.57 Kbytes Page：6 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：81.57 Kbytes Page：6 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

封装/外壳：24-TFSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC BUS SWITCH 10 X 1:1 24TVSOP 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC BUS SWITCH 10 X 1:1 24SOIC 集成电路（IC） 信号开关，多路复用器，解码器

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：81.57 Kbytes Page：6 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

LOW-VOLTAGE 10-BIT FET BUS SWITCH

文件：493.37 Kbytes Page：14 Pages

LOW-VOLTAGE 10-BIT BUS SWITCH

FEATURES: • 5Ω A/B bi-directional switch • Isolation under power-off conditions • Over-voltage tolerant • Latch-up performance exceeds 100mA • VCC = 2.3V - 3.6V, Normal Range • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Available in QSOP and T

10-bit bus switch with output enable

1. General description The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the switch is disabled. To ensure the high-impedance OFF-state during power-up or power-down, OE should b

10-bit bus switch with output enable

1. General description The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the switch is disabled. To ensure the high-impedance OFF-state during power-up or power-down, OE should b

10-bit bus switch with output enable

LOW-VOLTAGE 10-BIT BUS SWITCH

文件：228.02 Kbytes Page：5 Pages