LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER BUFFER GATE

1FEATURES • Single-Supply Voltage Translator • Output Level Up to Supply VCC CMOS Level – 1.8 V to 3.3 V (at VCC = 3.3 V) – 2.5 V to 3.3 V (at VCC = 3.3 V) – 1.8 V to 2.5 V (at V CC = 2.5 V) – 3.3 V to 2.5 V (at V CC = 2.5 V • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Ou

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER BUFFER GATE

1FEATURES • Single-Supply Voltage Translator • Output Level Up to Supply VCC CMOS Level – 1.8 V to 3.3 V (at VCC = 3.3 V) – 2.5 V to 3.3 V (at VCC = 3.3 V) – 1.8 V to 2.5 V (at V CC = 2.5 V) – 3.3 V to 2.5 V (at V CC = 2.5 V • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Ou

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER BUFFER GATE

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Low-power buffer with voltage-level translator

1. General description The 74AUP1T50 provides the single buffer function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T50 is designed for logic-level translation applications with input switching levels that acc

Low-power buffer with voltage-level translator

1. General description The 74AUP1T50 provides the single buffer function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T50 is designed for logic-level translation applications with input switching levels that acc

Low-power buffer with voltage-level translator

1. General description The 74AUP1T50 provides the single buffer function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T50 is designed for logic-level translation applications with input switching levels that acc