OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus description These devices consist of bus-transceiver circuits, D-type flip-flo

具有三态输出的八路总线收发器/寄存器

These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA\\) inputs are provided to control the transceiver functions. Selec • Bus Transceivers/Registers• Independent Registers and Enables for A and B Buses• Multiplexed Real-Time and Stored Data• Choice of True or Inverting Data Paths• Choice of 3-State or Open-Collector Outputs to A Bus DEVICE A OUTPUT B OUTPUT LOGIC SN74ALS651A, 'AS651 3-State 3-State Inverting ;

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：331.92 Kbytes Page：22 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：700.98 Kbytes Page：33 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：906.08 Kbytes Page：33 Pages

丝印代码：AS652；OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus description These devices consist of bus-transceiver circuits, D-type flip-flo

丝印代码：AS652；OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus description These devices consist of bus-transceiver circuits, D-type flip-flo

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus description These devices consist of bus-transceiver circuits, D-type flip-flo

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus description These devices consist of bus-transceiver circuits, D-type flip-flo

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：906.08 Kbytes Page：33 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：700.98 Kbytes Page：33 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：331.92 Kbytes Page：22 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：700.98 Kbytes Page：33 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：906.08 Kbytes Page：33 Pages

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC TXRX NON-INVERT 5.5V 24SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC TXRX NON-INVERT 5.5V 24SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：700.98 Kbytes Page：33 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：331.92 Kbytes Page：22 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：906.08 Kbytes Page：33 Pages

Octal Bus Transceiver and Register

General Description These devices incorporate an octal transceiver and an octal D-type register configured to enable transmission of data from bus to bus or internal register to bus. The DM74AS651 offers 64-Industrial grade product guaranteeing performance from −40°C to +85°C. These bus transcei

Octal Bus Transceiver and Register

文件：71.08 Kbytes Page：8 Pages