封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC TXRX INVERT 5.5V 24SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (J

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：1.002 Mbytes Page：27 Pages

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：270.88 Kbytes Page：18 Pages

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC TXRX INVERT 5.5V 24SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

IC TRANSCVR INVERT 5.5V 24SOIC

Octal Bus Transceiver and Register

General Description This device incorporates an octal bus transceiver and an octal D-type register configured to enable multiplexed transmission of data from bus to bus or internal register to bus. This bus transceiver features totem-pole 3-STATE outputs designed specifically for driving highly-

Octal Bus Transceiver and Register

General Description This device incorporates an octal bus transceiver and an octal D-type register configured to enable multiplexed transmission of data from bus to bus or internal register to bus. This bus transceiver features totem-pole 3-STATE outputs designed specifically for driving highly-