3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115

具有双路输出和三态输出的 3.3V 10 位触发器

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：122.72 Kbytes Page：9 Pages

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：317.65 Kbytes Page：12 Pages

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：317.65 Kbytes Page：12 Pages

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：122.72 Kbytes Page：9 Pages

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：317.65 Kbytes Page：12 Pages

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：317.65 Kbytes Page：12 Pages

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：122.72 Kbytes Page：9 Pages

封装/外壳：56-BSSOP（0.295"，7.50mm 宽） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 10BIT 56SSOP 集成电路（IC） 触发器

封装/外壳：56-BSSOP（0.295"，7.50mm 宽） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 10BIT 56SSOP 集成电路（IC） 触发器

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

文件：317.65 Kbytes Page：12 Pages

3.3-V 10-bit Flip Flops with Dual Outputs

Description The flip flops of the HD74ALVCH16820 are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output enable (OE) input can be used to place the ten outputs in either a normal logic state (high

3.3-V 10-bit Flip Flops with Dual Outputs

Description The flip flops of the HD74ALVCH16820 are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output enable (OE) input can be used to place the ten outputs in either a normal logic state (high