3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

文件：125.3 Kbytes Page：9 Pages

3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

文件：345.23 Kbytes Page：14 Pages

封装/外壳：56-BSSOP（0.295"，7.50mm 宽） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 20BIT 56SSOP 集成电路（IC） 触发器

3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · Output Ports Have Equivalent 26-W Series Resistors, So No External Resistors Are Required · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200

3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · Output Ports Have Equivalent 26-W Series Resistors, So No External Resistors Are Required · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200

3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

文件：345.23 Kbytes Page：14 Pages

封装/外壳：56-BSSOP（0.295"，7.50mm 宽） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 20BIT 56SSOP 集成电路（IC） 触发器

3.3-V 20-bit Flip Flops with 3-state Outputs

Description The HD74ALVCH162721’s twenty flip flops are edge triggered D-type flip flops with qualified clock storage. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output curren

3.3-V 20-bit Flip Flops with 3-state Outputs

Description The HD74ALVCH162721’s twenty flip flops are edge triggered D-type flip flops with qualified clock storage. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output curren

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the