丝印代码：AHCT138MEP；3-LINE TO 8-LINE DECODER/DEMULTIPLEXER

Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† EPIC (Enhanced-Performance Implanted CMOS) Process

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：125.3 Kbytes Page：9 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：125.3 Kbytes Page：9 Pages

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A