3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.04241 Mbytes Page：25 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.07278 Mbytes Page：25 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：667.63 Kbytes Page：20 Pages

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1X3:8 16SSOP 集成电路（IC） 信号开关，多路复用器，解码器

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.04241 Mbytes Page：25 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.07278 Mbytes Page：25 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.07278 Mbytes Page：25 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.04241 Mbytes Page：25 Pages

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC DECODER/DEMUX 1X3:8 16SSOP 集成电路（IC） 信号开关，多路复用器，解码器

3 TO 8 LINE DECODER DEMULTIPLEXER

Description The 74AHCT138 is an advanced high speed CMOS device that is designed to be pin compatable with 74LS low power Schottky types. Features • Supply Voltage Range from 4.5V to 5.5V • Sinks or Sources 8mA at VCC = 4.5V • CMOS Low Power Consumption • Schmitt Trigger Action at All Inputs

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary we

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary we

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A