3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

文件：271.19 Kbytes Page：10 Pages

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

文件：271.19 Kbytes Page：10 Pages