并联负载 8 位移位寄存器

The ’165 and ’LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD\\) input. These registers also • Complementary Outputs\n• Direct Overriding Load (Data) Inputs\n• Gated Clock Inputs\n• Parallel-to-Serial Data Conversion\nThe SN54165 and SN74165 devices are obsolete and are no longer supplied.;

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

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PARALLEL-LOAD 8-BIT SHIFT REGISTERS

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PARALLEL-LOAD-8-BIT SHIFT REGISTERS

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PARALLEL-LOAD 8-BIT SHIFT REGISTERS

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并联负载 8 位移位寄存器

The ’165 and ’LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD\\) input. These registers also • Complementary Outputs\n• Direct Overriding Load (Data) Inputs\n• Gated Clock Inputs\n• Parallel-to-Serial Data Conversion\nThe SN54165 and SN74165 devices are obsolete and are no longer supplied.;

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：199.88 Kbytes Page：13 Pages

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：755.27 Kbytes Page：16 Pages

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：199.88 Kbytes Page：13 Pages

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：371.66 Kbytes Page：15 Pages

PARALLEL-LOAD-8-BIT SHIFT REGISTERS

文件：342.3 Kbytes Page：15 Pages

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：755.27 Kbytes Page：16 Pages

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：199.88 Kbytes Page：13 Pages

8-BIT PARALLEL-TO-SERIAL SHIFT REGISTER

The SN54/74LS165 is an 8-bit parallel load or serial-in register with complementary outputs available from the last stage. Parallel inputing occurs asynchronously when the Parallel Load (PL) input is LOW. With PL HIGH, serial shifting occurs on the rising edge of the clock; new data enters via the

8-BIT PARALLEL-TO-SERIAL SHIFT REGISTER

The SN54/74LS165 is an 8-bit parallel load or serial-in register with complementary outputs available from the last stage. Parallel inputing occurs asynchronously when the Parallel Load (PL) input is LOW. With PL HIGH, serial shifting occurs on the rising edge of the clock; new data enters via the

BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS

The LS160A/161A/162A/163A are high-speed 4-bit synchronous count ers. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and other applications. The LS160A and LS162A count modulo 10 (BCD). The LS161A and LS163

8-Bit Parallel In/Serial Output Shift Registers

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