DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Controlled Baseline − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† 2-V to 6-V VCC Operation Inputs Accept Voltages to 6

SNx4AC74 Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset

1 Features • 2V to 6V VCC operation • Inputs accept voltages to 6V • Maximum tpd of 10ns at 5V 2 Applications • Convert a momentary switch to a toggle switch • Divide a clock signal by 2 or 4 3 Description The ’AC74 devices are dual positive-edge-triggered D-type flip-flops.

SN74AC74-Q1 Automotive Dual D-Type Flip-Flop with Preset and Clear

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

具有清零和预置端的双路正边沿触发式 D 型触发器

The ’AC74 devices are dual positive-edge-triggered D-type flip-flops.\n\n A low level at the preset (PRE)\\ or clear (CLR)\\ input sets or resets the outputs, regardless of the levels of the other inputs. When PRE\\ and CLR\\ are inactive (high), data at the data (D) input meeting the setup-time req • 2-V to 6-V VCC Operation\n• Inputs Accept Voltages to 6 V\n• Max tpd of 10 ns at 5 V;

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：1.14809 Mbytes Page：22 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：1.17091 Mbytes Page：23 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：542.71 Kbytes Page：17 Pages

具有清零和预置端的双路正边沿触发式 D 型触发器

The ’AC74 devices are dual positive-edge-triggered D-type flip-flops.\n\n A low level at the preset (PRE)\\ or clear (CLR)\\ input sets or resets the outputs, regardless of the levels of the other inputs. When PRE\\ and CLR\\ are inactive (high), data at the data (D) input meeting the setup-time req • 2-V to 6-V VCC Operation\n• Inputs Accept Voltages to 6 V\n• Max tpd of 10 ns at 5 V;

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：1.14809 Mbytes Page：22 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：1.14809 Mbytes Page：22 Pages

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：180.3 Kbytes Page：8 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：542.71 Kbytes Page：17 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：542.71 Kbytes Page：17 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：542.71 Kbytes Page：17 Pages