1-of-8 Decoder/Demultiplexer

1-of-8 Decoder/Demultiplexer High-Performance Silicon-Gate CMOS The SL74HC138 is identical in pinout to the LS/ALS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC138 decodes a three-bit Address to one-

3-8 Decoder/Demultiplexer

3-to-8 line decoder/demultiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory

3 TO 8 LINE DECODER DEMULTIPLEXER

Description The 74HC138 is a high speed CMOS device. The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce one active low output with the remaing seven being high. There are two active LOW enable inputs E1 and E2, and one active HIGH en

3-to-8 line decoder/demultiplexer inverting

3-to-8 Line Decoder/Demultiplexer; Inverting

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1?뭥f?? Decoder/ Demultiplexer High?뭁erformance Silicon?묰ate CMOS

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